valicors@xxxxxxxxxx writes:
<< Hi Tim,
I think Foveon´s new chips have 16.8 mega pixels.
..."The 16.8-million-pixel (4Kx4K) image sensor provides quality
unmatched by current sensors produced by other CMOS or CCD vendors"...
What are you talking about 12 mega pixels? I think this tech is much
better than Kodak´s one, don´t you?
>>
In my post I was refering to their current generation chips not their
anounced new chips.
When comparing anounced new products in the pixel wars you also need
to differentiate between using 3 seperate chips with beam splitter versus a
single multicolor sensors. B/W chips (used with filters/beam splitters for
color) can have a higher pixel count for any given area. I think I read
somewhere something like 20-30% since they have less wasted area. Using
three seperate chips is highest performance but very expensive even when
bonded to the beam splitter as Foveon does. Pro quality video cameras reflect
this large price differential for 3CCD devices with splitter.
In theory the CCD chips of Kodak and others should be better than
Foveon's CMOS devices (assuming equal pixel counts similar dichroic mirror
splitters etc) but should be much more expensive. The interesting thing is
that Foveon is claiming their chips are almost as good as CCD devices. In a
sense it is strange: Foveon is going after the very high end, money no
object, imaging market with a lower performance technology! They do have
high credibility because they are headed by Carver Mead, one of the most
respected researchers into chip design methods and a professor at Caltech.
They are also backed by Mr Frederico Faggin one of the original designers of
Intels 8080 and Zilog's Z80 chips. Carver Mead and his students has gone from
pioneering digital chip design methods, to more recently designing analog
CMOS computer chips which model retinal signal processing,the cochlear and
neurons. In the retina a large amount of preprocessing goes on detecting
movement, edges contrast etc prior to the signals going to the brain. The
retina acts as an extension of the cortex. An interesting question with
Foveon is: are they going to use the CMOS detector chips to do a substantial
amount of preprocessing like a real retina? Could they do some sort of analog
processing based on continuous sensors with no actual discrete pixels thereby
getting round the sampled nature of normal detectors? In some of their early
literature they imply they were going to do something different since they
talk of the detectors having characteristics more like film with a
granularity varying with exposure. A lot of the problems they talk about with
conventional silicon sensors relate to the sampled (pixelated nature of the
detector chips). It is interesting to compare modern TV cameras based on CCD
chips with older image orthicon or other vacuum devices. These devices also
suffered from moire effects from the vertical scan lines but did not suffer
from horizontal moire effects. A modern CCD video camera suffers both
horizontally and vertically because of the pixels. If you had digitised the
older devices at a high enough rate (higher than the device bandwidth) then
the horizontal pixel issues go away with these older devices. It would be
interesting to know if Foveon is wanting to do something equivalent with
some analog preprocessing on chip to eliminate spatial sampling issues. If
they add digital signal processing to the sensor chips they could also do
more compression on the fly and possibly make frame rates much higher and
storage easier. An interesting spec for their cameras is the frame rate. I
seem to remember 4seconds between each exposure. This will probably become a
hot area of competition once high pixel count chips are common since the
required data rates get really high as the resolution goes up.
Here are some related links some posted by others previously:
http://www.foveon.net/interp.html
http://ebnonline.com/story/chipwire/OEG19990708S0026
Another small Faggin/Mead company:
http://www.synaptics.com/product.html
Carver Mead Bio:
http://www.cns.caltech.edu/Faculty/Mead.html
Mead originated, Analog VLSI course at Caltech:
http://www.pcmp.caltech.edu/cns182/index.html
Book:
Analog VLSI implementation of neural systems/ edited by
Carver Mead and Mohammed Ismail
Boston London: Kluwer Academic, c1989.
F8.04-181.4 ANA
Conway review of chip layout developement:
http://ai.eecs.umich.edu/~mirror/MPCAdv/MPCAdv.html
Regards,
Tim Hughes
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